In accordance with Moore's law, the semiconductor industry has been scaling down the feature sizes of silicon metal-oxide-semiconductor field-effect transistors (MOSFETs) for the last few decades to improve the performance and minimize the cost of complementary MOS (CMOS) technology. As the continuous down scaling of the MOSFET approaches its fundamental limits, the performance of CMOS can no longer be improved by simply making the salient feature sizes smaller. In order to extend the life of CMOS technology, several modifications in conventional FETs including strain in the channel, high-k gate stack and nanowire tri-gate devices have been proposed. Different channel materials such as Ge, InAs, InSb etc. have also been explored. Yet, each of these approaches shares the same current switching mechanism and hence they are limited by the same subthreshold slope of 60 mV/dec. This imposes a minimum requirement on the operating voltage which controls the amount of power-consumption in the device. As the power consumption in the conventional CMOS technology has become the limiting factor for further down scaling of MOSFETs, alternative channel materials and novel switching mechanisms are required to continue the evolution of electronics.
Graphene, a sheet of carbon atoms arranged in a honeycomb structure, is one of the promising alternative channel materials of future electronic devices. Negligible spin-orbit coupling combined with high carrier mobility and a long mean free path make graphene a very attractive material for post CMOS electronic devices. Although graphene has many exceptional electronic and mechanical properties, lack of a bandgap reduces its utility for conventional electronic device applications. A bandgap can be opened by various means but it is difficult to create a sufficiently large bandgap without degrading the electronic properties of graphene. One approach to circumvent the bandgap problem is to utilize the unique properties of graphene in alternative device architectures. In search for a replacement of the conventional transistor, my doctoral research has been primarily focused on the design, modeling and simulation of novel electronic devices that utilize the exceptional properties of graphene.
Topological Insulator (TI) is a new quantum mechanical phase of matter. The interior of a TI behaves like an insulator but its edges or surfaces are metallic. In the edge or surface electrons move as relativistic Dirac fermions. The surface of the 3D TI has the similar properties of graphene except that the pseudo-spins of graphene are real spins in TI. Currently, my research on TI is focused on understanding the quantum transport in TI to determine how they can be best used in electronic device applications.